Packaging & Test · Qualification
Reliability Qualification & Electrical Test
HTOL, HAST, THB, temperature cycling, ESD, and latch-up for new parts, plus the burn-in boards and DUT cards to run them.
What it is
Qualification is where NPI schedules slip quietly. The test plan is fine; what's missing is the burn-in board, the socket, or a lab slot that lines up with when parts come off the packaging line.
We run qualification on the same engagement as packaging, so parts move straight from assembly into stress, and the burn-in boards and DUT cards come with it. When something fails, failure analysis is part of the same engagement rather than another purchase order.
Chamber ranges
The test chambers span −65 °C to 200 °C between them. HAST and the pressure cooker add humidity and pressure.
- Thermal shock−65 to 150
- Temperature cycling−65 to 150
- Temperature-humidity−65 to 150, 20–98 %RH
- High-temperature oven25 to 200
- HAST105 to 150, 65–100 %RH
- Pressure cooker121, 100 %RH, 15 psig
°C
Burn-in boards, turnkey
- 01SizeSockets, power, and per-pin current set the board count
- 02DesignSchematic and layout on high-Tg, polyimide, or FR4
- 03BuildSMT assembly
- 04DebugBrought up before the parts go in
Capabilities
- Life & bias stress
- HTOL: high-temperature operating life
- HTRB / HTGB: high-temperature reverse and gate bias
- H3TRB: high-humidity, high-temperature reverse bias
- BLT: bias life test
- Environmental stress
- HAST: highly accelerated stress test
- THB: temperature-humidity bias
- PCT: pressure cooker test
- TCT: temperature cycling
- THST / THCT: thermal shock and thermal cycling variants
- HTST / LTST: high- and low-temperature storage
- Assembly robustness
- MSL preconditioning, levels 1 to 6
- Reflow simulation
- Electrical test
- ESD: HBM, MM, CDM
- Latch-up
- Wafer probe (CP)
- Final test (FT)
- Burn-in boards
- HTOL, THB, HAST, H3TRB, HTGB, and HTRB boards
- Turnkey: schematic, layout, SMT, and debug
- High-Tg, polyimide, and FR4 materials
- Board count sized from sockets, power, and per-pin current
- DUT cards and custom test fixtures
Quality systems
ISO 9001
Quality management
ISO 14001
Environmental management
ISO 45001
Occupational health & safety
Packaging and test performed in ISO 9001, ISO 14001, and ISO 45001-certified facilities. Certificates available under NDA.
Common questions
- Which reliability tests do you run?
- HTOL, HTRB, HTGB, H3TRB, BLT, HAST, THB, PCT, TCT, THST, THCT, HTST, LTST, MSL preconditioning, and reflow, plus ESD (HBM, MM, CDM) and latch-up.
- Do you provide burn-in boards?
- Yes, turnkey: we size the sockets and board count from your schematic and package drawing, then design, lay out, assemble, and debug the boards. That removes the most common wait in a qualification schedule.
- Can you package and qualify the same lot?
- Yes. Packaging, qualification, and failure analysis run on one engagement, so parts move from assembly into stress without a handoff.
More packaging & test
Packaging, Test & Failure Analysis
Quick-turn packaging, reliability qualification, and failure analysis built for NPI: one team from first silicon to a qualified part on a working board.
Quick-Turn Ceramic Packaging
Small-batch ceramic DIP, QFP, QFN, LCC, PGA, SiP, and BGA packages for engineering samples, MPW die, and parts that need to survive characterization.
Quick-Turn Plastic Packaging
Small-batch molded packages from 3-pin SOT to 256-pin LQFP, so engineering samples ship in the package production will use.
Failure Analysis & FIB Circuit Edit
FIB circuit edit down to 28nm, decap, delayering, and SEM imaging, so a first-silicon bug can be proven and patched before the next tape-out.
Package & Substrate Design
Package selection, substrate stack-up, ball maps, and SI, PI, and thermal co-simulation for flip-chip BGA, SiP, and chiplet designs.
Wafer Thinning, Dicing & Die Sort
Thinning to 50 µm, laser and blade dicing, SiC stealth dicing, GaAs laser dicing, and automated die sort for MPW, shuttle, and full wafers.